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lt5538 1 5538f typical application features applications description 40mhz to 3.8ghz rf power detector with 75db dynamic range the lt ? 5538 is a 40mhz to 3800mhz monolithic logarith- mic rf power detector, capable of measuring rf signals over a wide dynamic range, from C75dbm to 10dbm. the rf signal in an equivalent decibel-scaled value is precisely converted into dc voltage on a linear scale. the wide linear dynamic range is achieved by measuring the rf signal us- ing cascaded rf limiters and rf detectors. their outputs are summed to generate an accurate linear dc voltage proportional to the input rf signal in dbm. the lt5538 delivers superior temperature stable output (within 1db over full temperature range) from 40mhz to 3.8ghz. the output is buffered with a low impedance driver. 40mhz - 3.8ghz logarithmic rf detector frequency range: 40mhz to 3.8ghz 75db log linear dynamic range exceptional accuracy over temperature linear dc output vs. input power in dbm C72dbm detection sensitivity single-ended rf input low supply current: 29ma supply voltage: 3v to 5.25v 8-lead dfn 3mm 3mm package received signal strength indication (rssi) rf power measurement and control rf/if power detection receiver rf/if gain control envelope detection ask receiver output voltage and linearity error vs input power in C enbl en v out 5v 100pf 0.1f in + gnd cap C out cap + v cc lt5538 5538 ta01 1nf 1nf 56 rf input 9 , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. 5538 ta02 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v at 880 mhz
lt5538 2 5538f pin configuration absolute maximum ratings power supply voltage ..............................................5.5v enable voltage .....................................?0.3v, v cc + 0.3v rf input power ....................................................15dbm operating ambient temperature ............ ?40c to +85c storage temperature range ................. ?65c to +125c maximum junction temperature........................... 150c (note 1) order information electrical characteristics the o denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v cc = 5v, enbl = 5v. (note 2) symbol parameter conditions min typ max units rf input input frequency range 40 to 3800 mhz dc common mode voltage v cc ?0.5 v input resistance 394 f rf = 40 mhz rf input power range ?75 to 10 dbm linear dynamic range 1db linearity error (note 3) 76 db output slope 19.9 mv/db logarithmic intercept (note 5) ?87.5 dbm sensitivity ?72 dbm output variation vs temperature normalized to output at 25c p in = ?50dbm; ?40c < t a < 85c p in = ?30dbm; ?40c < t a < 85c p in = ?10dbm; ?40c < t a < 85c o o o 0.1/0.6 ?0.1/0.6 ?0.2/0.6 db db db lead free finish tape and reel part marking package description temperature range lt5538idd#pbf lt5538idd#trpbf lcvg 8-lead (3mm 3mm) plastic dfn ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1enbl in + in ? gnd out cap + cap ? v cc
lt5538 3 5538f electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v cc = 5v, enbl = 5v. (note 2) symbol parameter conditions min typ max units 2nd order harmonic distortion pin = C10dbm; at rf input C62 dbc 3rd order harmonic distortion pin = C10dbm; at rf input C61 dbc f rf = 450 mhz rf input power range C75 to 10 dbm linear dynamic range 1 db linearity error (note 3) 75 db output slope 19.6 mv/db logarithmic intercept (note 5) C87.3 dbm sensitivity C71.5 dbm output variation vs temperature normalized to output at 25c p in = C50dbm; C40c < t a < 85c p in = C30dbm; C40c < t a < 85c p in = C10dbm; C40c < t a < 85c 0.1/0.6 0.1/0.5 C0.1/0.5 db db db 2nd order harmonic distortion pin = C10dbm; at rf input C43 dbc 3rd order harmonic distortion pin = C10dbm; at rf input C44 dbc f rf = 880 mhz rf input power range C75 to 10 dbm linear dynamic range 1 db linearity error (note 3) 75 db output slope 19.0 mv/db logarithmic intercept (note 5) C88.8 dbm sensitivity C71.5 dbm output variation vs temperature normalized to output at 25c p in = C50dbm; C40c < t a < 85c p in = C30dbm; C40c < t a < 85c p in = C10dbm; C40c < t a < 85c 0.1/0.7 0.1/0.4 0.1/0.4 db db db 2nd order harmonic distortion pin = C10dbm; at rf input C37 dbc 3rd order harmonic distortion pin = C10dbm; at rf input C40 dbc f rf = 2140 mhz rf input power range C72 to 10 dbm linear dynamic range 1 db linearity error (note 3) 70 db output slope 17.7 mv/db logarithmic intercept (note 5) C89.0 dbm sensitivity C69.0 dbm output variation vs temperature normalized to output at 25c p in = C50dbm; C40c < t a < 85c p in = C30dbm; C40c < t a < 85c p in = C10dbm; C40c < t a < 85c 0.3/0.4 0.4/0.1 0.7/0.5 db db db f rf = 2700 mhz rf input power range C72 to 10 dbm linear dynamic range 1 db linearity error (note 3) 65 db output slope 17.6 mv/db logarithmic intercept (note 5) C87.5 dbm
lt5538 4 5538f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: speci? cations over the C40c to 85c temperature range are assured by design, characterization and correlation with statistical process control. note 3: the linearity error is calculated by the difference between the incremental slope of the output and the average slope from C50dbm to C20dbm. the dynamic range is de? ned as the range over which the linearity error is within 1db. note 4: sensitivity is de? ned as the minimum input power required for the linearity error within 3db of the ideal log-linear transfer curve. note 5: logarithmic intercept is an extrapolated input power level from the best-? tted log-linear straight line, where the output voltage is 0v. symbol parameter conditions min typ max units sensitivity C69.5 dbm output variation vs temperature normalized to output at 25c p in = C50dbm; C40c < t a < 85c p in = C30dbm; C40c < t a < 85c p in = C10dbm; C40c < t a < 85c 0.3/0.3 0.7/C0.3 1.1/C0.9 db db db f rf = 3600 mhz rf input power range C65 to 10 dbm linear dynamic range 1 db linearity error (note 3) 57 db output slope 18 mv/db logarithmic intercept (note 5) C81.4 dbm sensitivity C63 dbm output variation vs temperature normalized to output at 25c p in = C45dbm; C40c < t a < 85c p in = C25dbm; C40c < t a < 85c p in = C5dbm; C40c < t a < 85c 0.6/C0.3 0.9/C0.6 1.4/C1.2 db db db output interface output dc voltage no rf signal present 0.350 v output impedance 150 source current 10 ma sink current 200 a rise time 0.5v to 1.6v, 10% to 90%, f rf = 880 mhz 100 ns fall time 1.6v to 0.5v, 10% to 90%, f rf = 880 mhz 180 ns power up/down enbl = high (on) 1v enbl = low (off) 0.3 v enbl input current venbl = 5v 205 a turn on time 300 ns turn off time 1s power supply supply voltage 3 5.25 v supply current 29 36 ma shutdown current enbl = low 1 100 a electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c, v cc = 5v, enbl = 5v. (note 2)
lt5538 5 5538f typical performance characteristics supply current vs supply voltage output voltage, linearity error vs input power at 40mhz v out variation vs input power at 40mhz output voltage, linearity error vs input power at 450mhz output voltage, linearity error vs input power at 2.14ghz v out variation vs input power at 2.14ghz (test circuit shown in figure 5) v out variation vs input power at 450mhz output voltage, linearity error vs input power at 880mhz v out variation vs input power at 880mhz 5538 g01 supply voltage v cc (v) 2.5 10 supply current i cc (ma) 15 20 25 30 40 3 3.5 4 4.5 5 5.5 35 t a = C40c t a = 25c t a = 85c 5538 g02 input power (dbm) C75 0.2 v out (v) linearity error (db) 0.5 0.8 1.1 1.4 2.0 C65 C55 C45 C35 C25 C15 C5 5 1.7 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g03 input power (dbm) C75 v out variation (db) C65 C55 C45 C35 C25 C15 C5 5 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c 5538 g04 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g05 input power (dbm) C75 v out variation (db) C65 C55 C45 C35 C25 C15 C5 5 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c 5538 g06 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g07 input power (dbm) v out variation (db) C65 C75 C55 C45 C35 C25 C15 C5 5 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c 5538 g08 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g09 input power (dbm) v out variation (db) C65 C75 C55 C45 C35 C25 C15 C5 5 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c
lt5538 6 5538f typical performance characteristics v out variation vs input power at 2.7ghz output voltage, linearity error vs input power at 3.6ghz v out variation vs input power at 3.6ghz slope distribution vs temperature at 2.14ghz output voltage, linearity error vs input power at 2.7ghz logarithmic intercept distribution vs temperature at 2.14ghz (test circuit shown in figure 5) 5538 g10 input power (dbm) C70 v out (v) linearity error (db) C60 C50 C40 C30 C20 C10 010 0 0.3 0.6 0.9 1.2 1.8 1.5 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g11 input power (dbm) v out variation (db) C60 C70 C50 C40 C30 C20 C10 010 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c 5538 g12 input power (dbm) v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0 0.3 0.6 0.9 1.2 1.8 1.5 C3 C2 C1 0 1 3 2 t a = C40c t a = 25c t a = 85c v cc = 5v 5538 g13 input power (dbm) v out variation (db) C60 C70 C50 C40 C30 C20 C10 010 C3 C2 C1 0 1 3 2 t a = C40c t a = 85c v cc = 5v normalized at 25c output voltage, linearity error vs v cc @40mhz output voltage, linearity error vs v cc @2140mhz output voltage, linearity error vs v cc @3600mhz 5538 g16 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 v cc = 5v v cc = 3v normalized at 5v 5538 g17 input power (dbm) C75 v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0.2 0.5 0.8 1.1 1.4 2.0 1.7 C3 C2 C1 0 1 3 2 v cc = 5v v cc = 3v normalized at 5v 5538 g18 input power (dbm) v out (v) linearity error (db) C65 C55 C45 C35 C25 C15 C5 5 0 0.3 0.6 0.9 1.2 1.8 1.5 C3 C2 C1 0 1 3 2 v cc = 5v v cc = 3v v cc = 5v 5538 g15 logarithmic intercept (dbm) percentage distribution (%) C78 C80 C82 C84 C86 C88 C90 C92 C94 C96 C98 0 2 4 6 8 12 10 14 16 t a = C40c t a = 25c t a = 85c 5538 g14 slope (mv/db) percentage distribution (%) 20 20.8 19.2 18.4 17.6 16.8 16 0 5 10 15 20 30 25 35 40 t a = C40c t a = 25c t a = 85c
lt5538 7 5538f pin functions enbl (pin 1): enable pin. an applied voltage above 1v will activate the bias for the ic. for an applied voltage below 0.3v, the circuits will be shut down (disabled) with a cor- responding reduction in power supply current. if the enable function is not required, then this pin can be connected to v cc . typical enable pin input currents are 100a for en = 3v and 200a for en = 5v, respectively. note that at no time should the enbl pin voltage be allowed to exceed v cc by more than 0.3v. in + (pin 2): rf input pin. the pin is internally biased to v cc C0.5v and should be dc blocked externally. the input is connected via internal 394 resistor to the in C pin which should be connected to ground with an ac-decoupling capacitor. in C (pin 3): ac ground pin. the pin is internally biased to v cc C0.5v and coupled to ground via internal 20pf capacitor. this pin should be connected to ground with an external ac-decoupling capacitor for low frequency operation. gnd (pin 4, exposed pad pin 9): circuit ground return for the entire ic. this pin must be soldered to the printed circuit board ground plane. v cc (pin 5): power supply pin. this pin should be de- coupled using 100pf and 0.1f capacitors. cap C , cap + (pins 6, 7): optional filter capacitor pins. these pins are internally connected to the detector outputs in front of the output buffer ampli? er. an external low-pass ? ltering can be formed by connecting a capacitor to vcc from each pin for ? ltering a low frequency modulation sig- nal. see the applications information section for detail. out (pin 8): detector dc output pin. block diagram rf limiter in + in C gnd rf limiter rf detector cells dc offset cancellation rf limiter rf limiter rf limiter cap C cap + 3 2 4 9 7 6 out 8 enbl 1 v cc 5 5538 bd01
lt5538 8 5538f the lt5538 is a 40mhz to 3.8 ghz logarithmic rf power detector. it consists of cascaded limiting ampli? ers and rf detectors. the output currents from every rf detector are combined and low-pass ? ltered before applied to the output buffer ampli? er. as a result, the ? nal dc output voltage approximates the logarithm of the amplitude of the input signal. the lt5538 is able to accurately measure an rf signal over a 70db dynamic range (C68dbm to 2dbm at 2.1ghz) with 50 single-ended input impedance. the slope of linear to log transfer function is about 17.7mv/db at 2.1ghz. within the linear dynamic range, very stable output is achieved over the full temperature range from C40c to 85c and over the full operating frequency range from 40mhz to 3.8ghz. the absolute variation over temperature is typically within 1db over 65db dynamic range at 2.1ghz. rf input the simpli? ed schematic of the input circuit is shown in figure 1. the in + and in C pins are internally biased to v cc C0.5v. the in C pin is internally coupled to ground via 20pf capacitor. an external capacitor of 1nf is needed to connect this pin to ground for low frequency operation. the impedance between in + and in C is about 394. the rf input pin in + should be dc blocked when connected to ground or other matching components. a 56 resistor (r1) connected to ground will provide better than 10db input return loss over the operating frequency range up to 1.5ghz. at higher operating frequency, additional lc matching elements are needed for a proper impedance matching to a 50 source as shown in figure 2. refer to figure 6 for the circuit schematic of the input matching network. the input impedance vs frequency of the rf input port in + is detailed in table 1. table 1. rf input impedance frequency (mhz) rf input impedance () s11 mag angle() 40 47.3 + j129.7 0.800 38.5 100 246.6 + j210.7 0.790 11.5 200 408.7 C j37.8 0.785 C1.5 400 192.9 C j190.9 0.772 C14.9 600 105.6 C j158.4 0.756 C25.3 800 69.3 C j127.4 0.737 C34.4 1000 51.8 C j106.2 0.720 C42.7 1200 41.5 C j90.9 0.707 C50.6 1400 34.2 C j78.7 0.697 C58.2 1600 29.2 C j60.0 0.687 C65.6 1800 25.4 C j60.7 0.678 C73.1 2000 22.6 C j53.8 0.669 C80.4 2200 20.5 C j47.7 0.659 C87.7 2400 18.9 C j42.4 0.649 C94.6 2600 17.9 C j37.6 0.638 C101.5 2800 17.1 C j33.4 0.627 C108.2 3000 16.4 C j29.5 0.615 C114.7 3200 16.1 C j26.0 0.602 C121.0 3400 15.9 C j22.8 0.589 C127.0 3600 15.9 C j20.0 0.574 C132.8 3800 15.9 C j17.5 0.560 C137.9 applications information 5.3k 394 in + in C 20p 5.3k v cc + C 5538 f01 figure 1. simpli? ed schematic of the input circuit figure 2. input return loss with additional lc matching network 5538 f02 frequency (ghz) 0 input return loss (db) 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 4.0 C30 C25 C20 C15 C10 0 C5 w/o l1 and c8 l1 = 1.5nh, c8 = 1pf c4, c11 = 12pf, c8 = 0.7pf
lt5538 9 5538f applications information output interface the output interface of the lt5538 is shown in figure 3. this output buffer circuit can source 10ma current to the load and sink 200 a current from the load. the small- signal output bandwidth is approximately 4mhz when the output is resistively terminated or open. the full-scaled 10% to 90% rise and fall times are 100ns and 180ns, respectively. the output transient responses at varied input power levels are shown in figure 4. when the part is enabled, the output impedance is about 150. when it is disabled, the output impedance is about 29.5k referenced to ground. external filtering at cap + , cap C the cap + and cap C pins are internally biased at v cc C0.36v via a 200 resistor from voltage supply v cc as shown in figure 3. these two pins are connected to the differential outputs of the internal rf detector cells. in combination with the 20pf in parallel, a low-pass ? lter is formed with C3db corner frequency of 20mhz. the high frequency recti? ed signals (particularly second-order harmonic of the rf signal) from the detector cells are ? ltered and then the dc output is ampli? ed by the output buffer ampli? er. in some applications, the lt5538 may be used to measure a modulated rf signal with low frequency am content (lower than 20mhz), a large modulation signal may be present at these two pins due to insuf? cient low-pass ? ltering, resulting in output voltage ? uctuation at the lt5538s output. its dc content may also vary depending upon the modulation frequency. to assure stable dc output of the lt5538, external capacitors c6 and c9 can be connected from cap + and cap C to v cc to ? lter out this low frequency am modulation signal. assume the modulation frequency of the rf signal is f mod , the capacitor value in farads of c6 and c9 can be chosen by the following formula: c6 (or c9) 10/(2 ? 200 ? f mod ) do not connect these two ? ltering capacitors to ground or any other low voltage reference at any time to avoid an abnormal start-up condition. figure 3. simpli? ed schematic of the output interface figure 4. simpli? ed circuit schematic of the output interface 200 cap + c9 cap C 200 100a 150 out 200a output currents from rf detectors lt5538 v cc 5538 f03 20p + C + C + C c6 5538 f04 time (s) pin = 0dbm pin = 10dbm pin = 20dbm pin = 30dbm pin = 40dbm pin = 50dbm v out (v) rf pulse enable (v) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.5 1.0 1.5 2.0 3.0 2.5 C18 C14 C10 C6 C2 6 2 at 880mhz rf pulse off rf pulse off rf pulse on
lt5538 10 5538f applications information enbl (enable) pin operation a simpli? ed circuit schematic of the enbl pin is shown in figure 5. the enable voltage necessary to turn on the lt5538 is 1v. the current drawn by the enbl pin varies with the voltage applied at the pin. when the enbl volt- age is 3v, the enbl current is typically 100 a. when the enbl voltage is 5v, the enbl current is increased to 200 a. to disable or turn off the chip, this voltage should be below 0.3v. it is important that the voltage applied to the enbl pin should never exceed v cc by more than 0.3v. otherwise, the supply current may be sourced through the upper esd protection diode connected at the enbl pin. under no circumstances should voltage be applied to the enbl pin before the supply voltage is applied to the v cc pin. if this occurs, damage to the ic may result. figure 5. simpli? ed schematic of the enable circuit figure 6. evaluation board circuit schematic 40mhz to 2.7ghz ref des value size part number c1 0.1f 0603 avx 0603zc104kat c2, c10 100pf 0402 avx 0402yc101kat c4, c5 1nf 0603 avx 0402zc102k c8 1pf 0402 avx 0402ya1rocat r1 56 0402 vishay, crcw040256rofked r4 4.99k 0402 vishay, crcw04024k99fked l1 1.5nh 0402 toko, ll1005-fh2in5s test circuit 42k 42k enbl v cc 5538 f05 in C enbl 1 enable c5 c4 l1 1.5nh r4 4.99k r5 5v o v out 2 3 4 9 8 7 6 5 c9 opt in + gnd cap C out cap + v cc lt5538 5538 tc01 1nf 1nf r1 56 rf input c8 1pf c6 opt c7 opt c1 0.1f c10 100pf c2 100pf 3.6ghz to 3.8ghz ref des value size part number c4, c11 12pf 0402 murata, grm155c1h120jz01b c8 0.7pf 0402 murata, gjr155c1hr70bb01 c5 open note: replace l 1 with c 11.
lt5538 11 5538f test circuit figure 7. component side of evalution board package description 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.38 0.10 bottom viewexposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 C 0.05 (dd8) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 5538 tc02
lt5538 12 5538f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com linear technology corporation 2008 lt 0408 ? printed in usa related parts part number description comments infrastructure lt5514 ultralow distortion, if ampli? er/adc driver with digitally controlled gain 850mhz bandwidth, 47 dbm oip3 at 100mhz, 10.5db to 33db gain control range lt5515 1.5ghz to 2.5ghz direct conversion quadrature demodulator 20dbm iip3, integrated lo quadrature generator lt5516 0.8ghz to 1.5ghz direct conversion quadrature demodulator 21.5dbm iip3, integrated lo quadrature generator lt5517 40mhz to 900mhz quadrature demodulator 21dbm iip3, integrated lo quadrature generator lt5518 1.5ghz to 2.4ghz high linearity direct quadrature modulator 22.8dbm oip3 at 2ghz, C158.2dbm/hz noise floor, 50 single-ended rf and lo ports, 4-channel w-cdma acpr = C64dbc at 2.14ghz lt5519 0.7ghz to 1.4ghz high linearity upconverting mixer 17.1dbm iip3 at 1ghz, integrated rf output transformer with 50 matching, single-ended lo and rf ports operation lt5520 1.3ghz to 2.3ghz high linearity upconverting mixer 15.9dbm iip3 at 1.9ghz, integrated rf output transformer with 50 matching, single-ended lo and rf ports operation lt5521 10mhz to 3700mhz high linearity upconverting mixer 24.2dbm iip3 at 1.95ghz, nf = 12.5db, 3.15v to 5.25v supply, single- ended lo port operation lt5522 600 mhz to 2.7ghz high signal level downconverting mixer 4.5v to 5.25v supply, 25dbm iip3 at 900mhz, nf = 12.5db, 50 single- ended rf and lo ports lt5524 low power, low distortion adc driver with digitally programmable gain 450mhz bandwidth, 40dbm oip3, 4.5db to 27db gain control lt5525 high linearity, low power downconverting mixer single-ended 50 rf and lo ports, 17.6dbm iip3 at 1900mhz, i cc = 28ma lt5526 high linearity, low power downconverting mixer 3v to 5.3v supply, 16.5dbm iip3, 100khz to 2ghz rf, nf = 11db, i cc = 28ma, C65dbm lo-rf leakage lt5527 400mhz to 3.7ghz high signal level downconverting mixer iip3 = 23.5dbm and nf = 12.5dbm at 1900mhz, 4.5v to 5.25v supply, i cc = 78ma, conversion gain = 2db lt5528 1.5ghz to 2.4ghz high linearity direct quadrature modulator 21.8dbm oip3 at 2ghz, C159.3dbm/hz noise floor, 50, 0.5v dc baseband interface, 4-channel w-cdma acpr = C66dbc at 2.14ghz lt5557 400mhz to 3.8ghz, 3.3v high signal level downconverting mixer iip3 = 23.7dbm at 2600mhz, 23.5dbm at 3600mhz, i cc = 82ma at 3.3v lt5560 ultra-low power active mixer 10ma s upply current, 10dbm iip3, 10db nf, usable as up- or down-converter. lt5568 700mhz to 1050mhz high linearity direct quadrature modulator 22.9dbm oip3 at 850mhz, C160.3dbm/hz noise floor, 50, 0.5v dc baseband interface, 3-ch cdma2000 acpr = C71.4dbc at 850mhz lt5572 1.5ghz to 2.5ghz high linearity direct quadrature modulator 21.6dbm oip3 at 2ghz, C158.6dbm/hz noise floor, high-ohmic 0.5v dc baseband interface, 4-ch w-cdma acpr = C67.7dbc at 2.14ghz lt5575 800mhz to 2.7ghz high linearity direct conversion i/q demodulator 50, single-ended rf and lo inputs. 28dbm iip3 at 900mhz, 13.2dbm p1db, 0.04db i/q gain mismatch, 0.4 i/q phase mismatch rf power detectors lt c ? 5505 rf power detectors with >40db dynamic range 300mhz to 3ghz, temperature compensated, 2.7v to 6v supply ltc5507 100khz to 1000mhz rf power detector 100khz to 1ghz, temperature compensated, 2.7 to 6v supply ltc5508 300mhz to 7ghz rf power detector 44db dynamic range, temperature compensated, sc70 package ltc5509 300mhz to 3ghz rf power detector 36db dynamic range, low power consumption, sc70 package ltc5530 300mhz to 7ghz precision rf power detector precision v out offset control, shutdown, adjustable gain ltc5531 300mhz to 7ghz precision rf power detector precision v out offset control, shutdown, adjustable offset ltc5532 300mhz to 7ghz precision rf power detector precision v out offset control, adjustable gain and offset lt5534 50mhz to 3ghz log rf power detector with 60db dynamic range 1db output variation over temperature, 38ns response time, log linear response ltc5536 precision 600mhz to 7ghz rf power detector with fast comparator output 25ns response time, comparator reference input, latch enable input, C26dbm to +12dbm input range lt5537 wide dynamic range log rf/if detector low frequency to 1ghz, 83db log linear dynamic range lt5570 2.7ghz rms power detector fast responding, up to 60db dynamic range, 0.3db accuracy over temperature and dynamic range

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